Edit

Share via


Avx10v1.MaskLoadAligned Method

Definition

Overloads

Name Description
MaskLoadAligned(UInt64*, Vector256<UInt64>, Vector256<UInt64>)

__m256i _mm256_mask_load_epi64 (__m256i s, __mmask8 k, void const * mem_addr)

VMOVDQA64 ymm1 {k1}{z}, m256

MaskLoadAligned(UInt64*, Vector128<UInt64>, Vector128<UInt64>)

__m128i _mm_mask_load_epi64 (__m128i s, __mmask8 k, void const * mem_addr)

VMOVDQA64 xmm1 {k1}{z}, m128

MaskLoadAligned(UInt32*, Vector256<UInt32>, Vector256<UInt32>)

__m256i _mm256_mask_load_epi32 (__m256i s, __mmask8 k, void const * mem_addr)

VMOVDQA32 ymm1 {k1}{z}, m256

MaskLoadAligned(UInt32*, Vector128<UInt32>, Vector128<UInt32>)

__m128i _mm_mask_load_epi32 (__m128i s, __mmask8 k, void const * mem_addr)

VMOVDQA32 xmm1 {k1}{z}, m128

MaskLoadAligned(Single*, Vector256<Single>, Vector256<Single>)

__m256 _mm256_mask_load_ps (__m256 s, __mmask8 k, void const * mem_addr)

VMOVAPS ymm1 {k1}{z}, m256

MaskLoadAligned(Single*, Vector128<Single>, Vector128<Single>)

__m128 _mm_mask_load_ps (__m128 s, __mmask8 k, void const * mem_addr)

VMOVAPS xmm1 {k1}{z}, m128

MaskLoadAligned(Int64*, Vector256<Int64>, Vector256<Int64>)

__m256i _mm256_mask_load_epi64 (__m256i s, __mmask8 k, void const * mem_addr)

VMOVDQA64 ymm1 {k1}{z}, m256

MaskLoadAligned(Int32*, Vector256<Int32>, Vector256<Int32>)

__m256i _mm256_mask_load_epi32 (__m256i s, __mmask8 k, void const * mem_addr)

VMOVDQA32 ymm1 {k1}{z}, m256

MaskLoadAligned(Int32*, Vector128<Int32>, Vector128<Int32>)

__m128i _mm_mask_load_epi32 (__m128i s, __mmask8 k, void const * mem_addr)

VMOVDQA32 xmm1 {k1}{z}, m128

MaskLoadAligned(Double*, Vector256<Double>, Vector256<Double>)

__m256d _mm256_mask_load_pd (__m256d s, __mmask8 k, void const * mem_addr)

VMOVAPD ymm1 {k1}{z}, m256

MaskLoadAligned(Double*, Vector128<Double>, Vector128<Double>)

__m128d _mm_mask_load_pd (__m128d s, __mmask8 k, void const * mem_addr)

VMOVAPD xmm1 {k1}{z}, m128

MaskLoadAligned(Int64*, Vector128<Int64>, Vector128<Int64>)

__m128i _mm_mask_load_epi64 (__m128i s, __mmask8 k, void const * mem_addr)

VMOVDQA64 xmm1 {k1}{z}, m128

MaskLoadAligned(UInt64*, Vector256<UInt64>, Vector256<UInt64>)

Source:
Avx10v1.cs

__m256i _mm256_mask_load_epi64 (__m256i s, __mmask8 k, void const * mem_addr)

VMOVDQA64 ymm1 {k1}{z}, m256

public:
 static System::Runtime::Intrinsics::Vector256<System::UInt64> MaskLoadAligned(System::UInt64* address, System::Runtime::Intrinsics::Vector256<System::UInt64> mask, System::Runtime::Intrinsics::Vector256<System::UInt64> merge);
public static System.Runtime.Intrinsics.Vector256<ulong> MaskLoadAligned(ulong* address, System.Runtime.Intrinsics.Vector256<ulong> mask, System.Runtime.Intrinsics.Vector256<ulong> merge);
static member MaskLoadAligned : nativeptr<uint64> * System.Runtime.Intrinsics.Vector256<uint64> * System.Runtime.Intrinsics.Vector256<uint64> -> System.Runtime.Intrinsics.Vector256<uint64>

Parameters

address
UInt64*
merge
Vector256<UInt64>

Returns

Remarks

The native and managed intrinsics have different order of parameters.

Applies to

MaskLoadAligned(UInt64*, Vector128<UInt64>, Vector128<UInt64>)

Source:
Avx10v1.cs

__m128i _mm_mask_load_epi64 (__m128i s, __mmask8 k, void const * mem_addr)

VMOVDQA64 xmm1 {k1}{z}, m128

public:
 static System::Runtime::Intrinsics::Vector128<System::UInt64> MaskLoadAligned(System::UInt64* address, System::Runtime::Intrinsics::Vector128<System::UInt64> mask, System::Runtime::Intrinsics::Vector128<System::UInt64> merge);
public static System.Runtime.Intrinsics.Vector128<ulong> MaskLoadAligned(ulong* address, System.Runtime.Intrinsics.Vector128<ulong> mask, System.Runtime.Intrinsics.Vector128<ulong> merge);
static member MaskLoadAligned : nativeptr<uint64> * System.Runtime.Intrinsics.Vector128<uint64> * System.Runtime.Intrinsics.Vector128<uint64> -> System.Runtime.Intrinsics.Vector128<uint64>

Parameters

address
UInt64*
merge
Vector128<UInt64>

Returns

Remarks

The native and managed intrinsics have different order of parameters.

Applies to

MaskLoadAligned(UInt32*, Vector256<UInt32>, Vector256<UInt32>)

Source:
Avx10v1.cs

__m256i _mm256_mask_load_epi32 (__m256i s, __mmask8 k, void const * mem_addr)

VMOVDQA32 ymm1 {k1}{z}, m256

public:
 static System::Runtime::Intrinsics::Vector256<System::UInt32> MaskLoadAligned(System::UInt32* address, System::Runtime::Intrinsics::Vector256<System::UInt32> mask, System::Runtime::Intrinsics::Vector256<System::UInt32> merge);
public static System.Runtime.Intrinsics.Vector256<uint> MaskLoadAligned(uint* address, System.Runtime.Intrinsics.Vector256<uint> mask, System.Runtime.Intrinsics.Vector256<uint> merge);
static member MaskLoadAligned : nativeptr<uint32> * System.Runtime.Intrinsics.Vector256<uint32> * System.Runtime.Intrinsics.Vector256<uint32> -> System.Runtime.Intrinsics.Vector256<uint32>

Parameters

address
UInt32*
merge
Vector256<UInt32>

Returns

Remarks

The native and managed intrinsics have different order of parameters.

Applies to

MaskLoadAligned(UInt32*, Vector128<UInt32>, Vector128<UInt32>)

Source:
Avx10v1.cs

__m128i _mm_mask_load_epi32 (__m128i s, __mmask8 k, void const * mem_addr)

VMOVDQA32 xmm1 {k1}{z}, m128

public:
 static System::Runtime::Intrinsics::Vector128<System::UInt32> MaskLoadAligned(System::UInt32* address, System::Runtime::Intrinsics::Vector128<System::UInt32> mask, System::Runtime::Intrinsics::Vector128<System::UInt32> merge);
public static System.Runtime.Intrinsics.Vector128<uint> MaskLoadAligned(uint* address, System.Runtime.Intrinsics.Vector128<uint> mask, System.Runtime.Intrinsics.Vector128<uint> merge);
static member MaskLoadAligned : nativeptr<uint32> * System.Runtime.Intrinsics.Vector128<uint32> * System.Runtime.Intrinsics.Vector128<uint32> -> System.Runtime.Intrinsics.Vector128<uint32>

Parameters

address
UInt32*
merge
Vector128<UInt32>

Returns

Remarks

The native and managed intrinsics have different order of parameters.

Applies to

MaskLoadAligned(Single*, Vector256<Single>, Vector256<Single>)

Source:
Avx10v1.cs

__m256 _mm256_mask_load_ps (__m256 s, __mmask8 k, void const * mem_addr)

VMOVAPS ymm1 {k1}{z}, m256

public:
 static System::Runtime::Intrinsics::Vector256<float> MaskLoadAligned(float* address, System::Runtime::Intrinsics::Vector256<float> mask, System::Runtime::Intrinsics::Vector256<float> merge);
public static System.Runtime.Intrinsics.Vector256<float> MaskLoadAligned(float* address, System.Runtime.Intrinsics.Vector256<float> mask, System.Runtime.Intrinsics.Vector256<float> merge);
static member MaskLoadAligned : nativeptr<single> * System.Runtime.Intrinsics.Vector256<single> * System.Runtime.Intrinsics.Vector256<single> -> System.Runtime.Intrinsics.Vector256<single>

Parameters

address
Single*
merge
Vector256<Single>

Returns

Remarks

The native and managed intrinsics have different order of parameters.

Applies to

MaskLoadAligned(Single*, Vector128<Single>, Vector128<Single>)

Source:
Avx10v1.cs

__m128 _mm_mask_load_ps (__m128 s, __mmask8 k, void const * mem_addr)

VMOVAPS xmm1 {k1}{z}, m128

public:
 static System::Runtime::Intrinsics::Vector128<float> MaskLoadAligned(float* address, System::Runtime::Intrinsics::Vector128<float> mask, System::Runtime::Intrinsics::Vector128<float> merge);
public static System.Runtime.Intrinsics.Vector128<float> MaskLoadAligned(float* address, System.Runtime.Intrinsics.Vector128<float> mask, System.Runtime.Intrinsics.Vector128<float> merge);
static member MaskLoadAligned : nativeptr<single> * System.Runtime.Intrinsics.Vector128<single> * System.Runtime.Intrinsics.Vector128<single> -> System.Runtime.Intrinsics.Vector128<single>

Parameters

address
Single*
merge
Vector128<Single>

Returns

Remarks

The native and managed intrinsics have different order of parameters.

Applies to

MaskLoadAligned(Int64*, Vector256<Int64>, Vector256<Int64>)

Source:
Avx10v1.cs

__m256i _mm256_mask_load_epi64 (__m256i s, __mmask8 k, void const * mem_addr)

VMOVDQA64 ymm1 {k1}{z}, m256

public:
 static System::Runtime::Intrinsics::Vector256<long> MaskLoadAligned(long* address, System::Runtime::Intrinsics::Vector256<long> mask, System::Runtime::Intrinsics::Vector256<long> merge);
public static System.Runtime.Intrinsics.Vector256<long> MaskLoadAligned(long* address, System.Runtime.Intrinsics.Vector256<long> mask, System.Runtime.Intrinsics.Vector256<long> merge);
static member MaskLoadAligned : nativeptr<int64> * System.Runtime.Intrinsics.Vector256<int64> * System.Runtime.Intrinsics.Vector256<int64> -> System.Runtime.Intrinsics.Vector256<int64>

Parameters

address
Int64*
merge
Vector256<Int64>

Returns

Remarks

The native and managed intrinsics have different order of parameters.

Applies to

MaskLoadAligned(Int32*, Vector256<Int32>, Vector256<Int32>)

Source:
Avx10v1.cs

__m256i _mm256_mask_load_epi32 (__m256i s, __mmask8 k, void const * mem_addr)

VMOVDQA32 ymm1 {k1}{z}, m256

public:
 static System::Runtime::Intrinsics::Vector256<int> MaskLoadAligned(int* address, System::Runtime::Intrinsics::Vector256<int> mask, System::Runtime::Intrinsics::Vector256<int> merge);
public static System.Runtime.Intrinsics.Vector256<int> MaskLoadAligned(int* address, System.Runtime.Intrinsics.Vector256<int> mask, System.Runtime.Intrinsics.Vector256<int> merge);
static member MaskLoadAligned : nativeptr<int> * System.Runtime.Intrinsics.Vector256<int> * System.Runtime.Intrinsics.Vector256<int> -> System.Runtime.Intrinsics.Vector256<int>

Parameters

address
Int32*
merge
Vector256<Int32>

Returns

Remarks

The native and managed intrinsics have different order of parameters.

Applies to

MaskLoadAligned(Int32*, Vector128<Int32>, Vector128<Int32>)

Source:
Avx10v1.cs

__m128i _mm_mask_load_epi32 (__m128i s, __mmask8 k, void const * mem_addr)

VMOVDQA32 xmm1 {k1}{z}, m128

public:
 static System::Runtime::Intrinsics::Vector128<int> MaskLoadAligned(int* address, System::Runtime::Intrinsics::Vector128<int> mask, System::Runtime::Intrinsics::Vector128<int> merge);
public static System.Runtime.Intrinsics.Vector128<int> MaskLoadAligned(int* address, System.Runtime.Intrinsics.Vector128<int> mask, System.Runtime.Intrinsics.Vector128<int> merge);
static member MaskLoadAligned : nativeptr<int> * System.Runtime.Intrinsics.Vector128<int> * System.Runtime.Intrinsics.Vector128<int> -> System.Runtime.Intrinsics.Vector128<int>

Parameters

address
Int32*
merge
Vector128<Int32>

Returns

Remarks

The native and managed intrinsics have different order of parameters.

Applies to

MaskLoadAligned(Double*, Vector256<Double>, Vector256<Double>)

Source:
Avx10v1.cs

__m256d _mm256_mask_load_pd (__m256d s, __mmask8 k, void const * mem_addr)

VMOVAPD ymm1 {k1}{z}, m256

public:
 static System::Runtime::Intrinsics::Vector256<double> MaskLoadAligned(double* address, System::Runtime::Intrinsics::Vector256<double> mask, System::Runtime::Intrinsics::Vector256<double> merge);
public static System.Runtime.Intrinsics.Vector256<double> MaskLoadAligned(double* address, System.Runtime.Intrinsics.Vector256<double> mask, System.Runtime.Intrinsics.Vector256<double> merge);
static member MaskLoadAligned : nativeptr<double> * System.Runtime.Intrinsics.Vector256<double> * System.Runtime.Intrinsics.Vector256<double> -> System.Runtime.Intrinsics.Vector256<double>

Parameters

address
Double*
merge
Vector256<Double>

Returns

Remarks

The native and managed intrinsics have different order of parameters.

Applies to

MaskLoadAligned(Double*, Vector128<Double>, Vector128<Double>)

Source:
Avx10v1.cs

__m128d _mm_mask_load_pd (__m128d s, __mmask8 k, void const * mem_addr)

VMOVAPD xmm1 {k1}{z}, m128

public:
 static System::Runtime::Intrinsics::Vector128<double> MaskLoadAligned(double* address, System::Runtime::Intrinsics::Vector128<double> mask, System::Runtime::Intrinsics::Vector128<double> merge);
public static System.Runtime.Intrinsics.Vector128<double> MaskLoadAligned(double* address, System.Runtime.Intrinsics.Vector128<double> mask, System.Runtime.Intrinsics.Vector128<double> merge);
static member MaskLoadAligned : nativeptr<double> * System.Runtime.Intrinsics.Vector128<double> * System.Runtime.Intrinsics.Vector128<double> -> System.Runtime.Intrinsics.Vector128<double>

Parameters

address
Double*
merge
Vector128<Double>

Returns

Remarks

The native and managed intrinsics have different order of parameters.

Applies to

MaskLoadAligned(Int64*, Vector128<Int64>, Vector128<Int64>)

Source:
Avx10v1.cs

__m128i _mm_mask_load_epi64 (__m128i s, __mmask8 k, void const * mem_addr)

VMOVDQA64 xmm1 {k1}{z}, m128

public:
 static System::Runtime::Intrinsics::Vector128<long> MaskLoadAligned(long* address, System::Runtime::Intrinsics::Vector128<long> mask, System::Runtime::Intrinsics::Vector128<long> merge);
public static System.Runtime.Intrinsics.Vector128<long> MaskLoadAligned(long* address, System.Runtime.Intrinsics.Vector128<long> mask, System.Runtime.Intrinsics.Vector128<long> merge);
static member MaskLoadAligned : nativeptr<int64> * System.Runtime.Intrinsics.Vector128<int64> * System.Runtime.Intrinsics.Vector128<int64> -> System.Runtime.Intrinsics.Vector128<int64>

Parameters

address
Int64*
merge
Vector128<Int64>

Returns

Remarks

The native and managed intrinsics have different order of parameters.

Applies to